1. Field of the Invention
The present invention relates in general to a semiconductor device and in particular is concerned with a semiconductor memory device of a flip-flop type constituted by MISFET semiconductor devices, and a method of fabricating the same.
2. Description of the Prior Art
As a semiconductor memory devise, a dynamic flip-flop type semiconductor memory device composed of four MISFET's is disclosed in the specification of U.S. Pat. No. 3,541,530. In such a dynamic memory type of semiconductor memory device, the holding of information can be effected without supplying current constantly, to thus avoid useless power consumption. Further, the memory cell can be implemented in a small area. However, since the stored information tends to be lost due to leakage, it is required to carry out periodically the refreshing operation. Such being the case, complicated interface circuitry for the refreshing operation is required.
On the other hand, as a static memory type of semiconductor device, there is disclosed in the specification of U.S. Pat. No. 3,560,764 a flip-flop type semiconductor memory device which comprises a pair of inverter circuits cross-coupled with each other, wherein each of the inverter circuits is composed of a MISFET serving as load and a driving MISFET. In the case of such a static type semiconductor memory device no refreshing circuit is required, as differred from the dynamic type semiconductor memory device described above. However, the static type semiconductor memory device has a drawback in that power consumption is relatively large. In order to decrease the power consumption, it is necessary to make smaller the channel conductivity .beta. (channel width W/channel length l) in the load MISFET of the memory device. This means that the channel length l has to be selected at a greater dimension, which in turn leads to an enlarged size of the load MISFET and hence degradation in the integration density.
As an attempt to overcome the above difficulties, there is taught in Japanese Patent Application Laid-Open (Kokai) No. 50-11644 a load means which is composed of a polycrystalline silicon layer having s resistivity increased by ion implantation in place of the MISFET, thereby to enhance the integration density. However, in practice, it is impossible to reduce the occupation area of a memory cell of the static type memory device to a degree corresponding to the area for the memory cell of the dynamic type memory device. Thus, there has been a demand for a memory device which has a high integration density compatible to that of the dynamic memory type memory device and allows the refreshing to be effected in a simple and facilitated manner.